A curated selection of technical work.
A fully custom ROS 2 communication bridge for embedded microcontrollers, featuring CRC-framed packet protocols over UART or SPI. Enables reliable, high-throughput messaging between ROS-based systems and bare-metal or RTOS-driven nodes in resource-constrained environments.
GitHub ↗A deterministic SPI communication layer with UART failover with zero-copy circular buffers, CRC validation, and transport failover, designed for robust, low-latency inter-node messaging in the EPFL Xplore rover’s avionics network.
GitHub ↗
Explores physical nonlinearities as activation functions for analog deep learning. Two approaches:
1. GHz binary tunable metasurface utilizing coupled resonators with PIN-diode-controlled RF phase shifting
2. Optical setup emulating GELU activation through structured incoherent light and Fresnel transmission.
A fully pipelined FPGA-accelerated DSP system for real-time extraction of Doppler-shifted 21 cm hydrogen lines from raw radio telescope data, optimized across latency, energy, and spectral resolution.
GitHub ↗A C++ CAN MessageBus framework for static, zero‐overhead packet exchange across Xplore’s rover subsystems, featuring packed packet definitions, protocol versioning, and a portable IOBus/NetworkBus layer.
GitHub ↗3×3 convolution, bias and ReLU fused into a single HLS kernel with multi-row caching and four-filter parallelism—reaching 50× speed-up over initial software.
GitHub ↗A high-performance FPGA demo combining live Mandelbrot fractals with a playable Pong game, fully implemented in VHDL on the PYNQ-Z2 platform. Features pipelined fixed-point fractal generation, dual-port BRAM framebuffer, clock-domain crossing, and advanced FSM-driven game logic.
GitHub ↗AVR Assembly–driven alarm clock, ms-precision timer, and sprinkler control with custom fixed-point math and Taylor libraries.
GitHub ↗I'm cooking up something special. Stay tuned for exciting updates and fresh work dropping shortly.